Electronic components such as semiconductor elements are mounted on wiring substrate of various shapes and various structures. Recent semiconductor elements have become highly integrated and highly sophisticated. This has increased the demand for finer wirings formed in a wiring substrate on which a semiconductor element is mounted. Japanese Laid-Open Patent Publication No. 2006-80571 describes one example of a wiring substrate. In the wiring substrate, a solder resist is formed on a base substrate, on which a wiring pattern is formed, to serve as a protective insulation layer. The wiring pattern is partially exposed from the solder resist to serve as connection pads.
The solder resist has a greater thickness than the wiring pattern. The solder resist includes openings, each of which has a small diameter and exposes a portion of the wiring pattern as a connection pad. The connection pads, which are exposed from the openings, are electrically connected to a semiconductor element. In such a solder resist, residues may form on an upper surface of the wiring pattern depending on the aspect ratio (ratio of depth to diameter) of the openings. Such residues on the wiring pattern may lead to a defect in electrical connection between the wiring substrate and the semiconductor element.